1. Field of the Invention
The present invention relates to a microcomputer formed by integrating a central processing unit (hereinafter referred to as a CPU), a read only memory (hereinafter referred to as a ROM), and the like on a semiconductor substrate, and more particularly, to a microcomputer with a function for checking the contents stored in the ROM.
2. Description of the Related Art
Conventionally, there has been provided such a microcomputer as disclosed in Japanese Patent Application Laid-Open No. 1-154248.
FIG. 2 shows a general schematic view of a conventional microcomputer disclosed in the above document. The microcomputer in the figure comprises a CPU 1, to which an address bus 2 and a data bus 3 are connected, for transmitting address signals and data signals respectively. To the address bus 2, an address terminal of a ROM 4 is connected. The ROM 4 is a memory means that contains a predetermined data storing area wherein the data stored in an area designated by an address signal fed to the address terminal is read out. To the output side of the ROM 4, an input side of an output selection circuit 5 is connected. The output selection circuit 5 comprises a selection terminal S and a pair of output terminals O0, O1. The output selection circuit S selects either one of these output terminals in accordance with a logic "0" or "1" of a test signal TS fed to the selection terminal S by way of an external terminal 6, and outputs the signal inputted through the input side of the circuit.
The output terminals O0 and O1 of the selection circuit 5 are connected to the input terminal I0 and an external terminal 8 respectively. The input selection circuit 7 comprises input terminals I0 and I1, and also a selection terminal S. The input selection circuit 7 selects either one of signals inputted to these input terminals in accordance with a logic "0" or "1" of the test signal TS fed to the selection terminal S by way of an external terminal 6, and outputs the thus selected signal to the output side of the circuit. The input terminal I1 of the selection circuit 7 is connected to an external terminal 9, and the output side of the circuit 7 is connected to the data bus 3. Further, connected to the address bus 2 is an external terminal 10 for outputting address signals externally.
In the microcomputer structure as described above, as a normal operation mode is designated in its normal operation, the test signal TS to be fed to the external terminal 6 is set to "0". In this way, the signal fed to the output selection circuit 5 from the ROM 4 is outputted through the output terminal O0 side, so that the signal fed to the input terminal I0 of the input selection circuit 7 is selected to be outputted. In this way, the data in the ROM 4 is finally outputted to the data bus 3, and a digital process is executed by the CPU 1 on the basis of the program stored in the ROM 4.
On the other hand, in a test mode in which the content stored in the ROM 4 is to be tested, a data terminal and an address terminal of an external ROM (not shown) in which a test program is stored are connected to the external terminals 9 and 10 respectively, and a testing device for data reading is connected to the external terminal 8.
Further, the test signal TS to be fed to the external terminal 6 is set to "1". In this way, the signal fed to the input selection circuit 5 from the ROM 4 is outputted through the output terminal O1 side, so that the signal fed to the input terminal I1 of the input selection circuit 7 is selected to be outputted. Subsequently, the data stored in the external ROM is outputted to the data bus 3, and the data in the ROM 4 is outputted externally by way of the external terminal 8. The CPU 1 then executes a procedure in accordance with a test program stored in the external ROM. The address signal AD outputted to the address bus 2 is successively updated in accordance with the processing operation of the CPU 1. In accordance with the thus updated address signal AD, the data stored in the corresponding address in the ROM 4 is outputted to the external terminal 8, whereby the testing device connected to the external terminal 8 reads the thus outputted data and checks the content of the data stored in the ROM 4.
However, there have been the following two drawbacks in the test for checking the contents stored in the ROM 4 conducted by the conventional microcomputer.
(i) An external testing device is required to read the data stored in the ROM 4 outputted from the external terminal 8. PA1 (ii) Due to the fact that the address signals AD are fed from the address bus 2 to the address terminal of the ROM 4 on the basis of the test program stored in the external ROM, it is not an easy task and is in fact almost impossible to read all of the addresses one by one, so that making a complete test program for conducting a perfect test is rather difficult.